Samsung head visits next-gen semiconductor R&D complex

[Courtesy of Samsung Electronics]

Samsung Electronics Co. Executive Chairman Jay Y. Lee visited a research and development (R&D) complex for next-generation semiconductors that is currently being constructed at the company’s Giheung and Hwaseong chip facilities in the greater Seoul area.

According to Samsung Electronics on Thursday, Lee took a tour of the site and reviewed the company’s semiconductor strategies. After receiving a report on the company’s next-generation chip technologies, he discussed measures to enhance competitiveness across all chip sectors, including memory, foundry, and system, during the executive meeting that also took place that day.

Lee’s visit to the R&D complex site, a week ahead of the first anniversary of his inauguration, is believed to demonstrate his keen determination and the company’s efforts to secure the future competitiveness of its chip business amid a challenging industry downturn, whose end is seemingly approaching.

Lee emphasized the importance of unwavering technological leadership and proactive investment. “Amid ongoing crises at home and abroad, we must have a breakthrough to advance our chip business,” he said.

The Giheung facility is the birthplace of the company’s chip business. Since the Samsung chips debuted in 1983, this facility has been at the center of the company’s achievements, including the world’s first 64M DRAM development in 1992, topping the DRAM market in 1992, and then the memory chip sector in the following year. This facility was also Lee’s first official stop after being released on parole in 2022, where he attended the groundbreaking ceremony for the R&D complex.

The chip industry is a core business for the company and accounts for a vital sector for Korea’s exports, recently serving as a link in the chain of economic and security alliances amid intensifying U.S.-China competition for advanced technologies. Samsung Electronics’ ongoing investment moves for key technologies are believed to be coming amid this backdrop, despite consecutive quarterly losses.

The executive meeting was attended by the executives from the Device Solutions (DS) department, including Kyung Kye-hyun, the head of the department, Jung-Bae Lee, the head of the memory business, Choi Si-young, the head of the foundry business, and Chief Technology Officer Song Jai-hyuk. Other executives unable to be on site participated in the meeting via video conferencing. The executives reportedly had in-depth discussions on advanced process development status, technology capabilities, and supply chain strategies.

The R&D complex at the Giheung campus is an around 20 trillion-won ($150 trillion) project to build a key foundation for future semiconductor technology by 2030. It aims to be a complex where research, production, and distribution take place in one location, allowing rapid application of advanced technology developments to products.

Lee has been active in making visits to encourage on-site chip talent and to overcome crises, repeatedly expressing his willingness to invest in technology. Back in March, as he met with new recruits at its semiconductor research institute, he mentioned the company’s plan to “double the size of the semiconductor research institute in terms of quantity and quality,” emphasizing the importance of R&D capabilities. In February, he visited the Cheonan and Onyang facilities where chips with advanced packaging are manufactured. Samsung Electronics announced in March a 300 trillion won investment plan in Yongin in the greater Seoul area to create an advanced system semiconductor industrial complex over the next 20 years.

Meanwhile, Samsung Electronics held the “Samsung Foundry Forum and Samsung Advanced Foundry Ecosystem Forum 2023” on Thursday in Munich, where the company stated its ambition to expand its automotive foundry business based on advanced processes as well as starting mass production of 2-nanometer chips for auto solutions by 2026 to add the 2-nm chips to existing 14-nanometer, 8-nanometer, 5-nanometer, and 4-nanometer processes. “We plan to produce artificial intelligence chips for autonomous driving in phases, power semiconductors, microcontrollers, and more, tailored to customer demands,” Choi Si-young, who heads the memory business, said.