Samsung Elec to keep competition at bay by upping NAND height to 1,000 by 2030

[Photo provided by Samsung Electronics Co.]

Samsung Electronics plans to defend memory supremacy by initiating commercial production of flash memory on ninth-generation processing technology in 2024 and raise the height in NAND architect to 1,000-layers by 2030 through persistent investment regardless of the up and down cycle in chip industry, the world’s dominant DRAM and NAND maker said at its annual conference held in the U.S. on Wednesday (local time).

“One trillion gigabytes is the total amount of memory Samsung has made since its beginning over 40 years ago. About half of that trillion was produced in the last three years alone, indicating just how fast digital transformation is progressing,” said Lee Jung-bae, President and Head of Memory Business at Samsung Electronics.

“Advances in memory bandwidth, capacity and power efficiency enable new platformsˇand we will increasingly push for a higher level of integration on the journey toward digital coevolution.”

The world’s top chipmaker’s R&D commitment won’t be disrupted by the chip oversupply concerns and down cycle.

According to IC Insights, worldwide memory chip production capacity expanded by 3.21 million wafers this year. DRAM chip production capacity jumped 11.62 percent in a year to reach 19.88 million wafers this year, and that of NAND flash rose 5.54 percent to 21.71 million wafers. It is the first time for the combined figure to top 40 million.

Still, Samsung Electronics does not plan to adjust down output.

The immediate market situation may be unfavorable, but the company will not simply change the planned path, said Lee.

The Korean chip giant has never “artificially” cut down output. Instead, it seeks “natural” adjustment by reducing the wafer input and adjusting production lines to make chips at slower pace, because it is very costly to shut down lines and re-operate them.

At the conference, Samsung Electronics unveiled flash roadmap, envisioning 1,000-layer V-NAND by 2030 to better enable data-intensive technologies. Staking over 1,000 layers is not simply a matter of technology but proving the economical efficiency, said Lee.

Micron and SK hynix released 232-layer and 238-layer 3D NAND. Samsung has a different V-NAND structure and does not publicize the layer height. Its Gen-8 NAND is suspected to be in 236 layers.

The company also vowed to lead the development of next-generation DRAM chip technology that supports various data-intensive systems, such as HBM-PIM(Processing-in-Memory), AXDIMM(Acceleration DIMM), and CXL(Compute Express Link).

It is currently developing 1b DRAM with plans for mass production in 2023. The company said it has been developing disruptive solutions in patterning, materials and architecture, with technology like High-K material to overcome challenges in DRAM scaling beyond 10nm range.

On Thursday, shares in Samsung Electronics rose 1.25 percent to 56,700 won ($40.43) in Seoul, as of 12:39 p.m.

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