Samsung Electronics starts mass production of 3-nanometer chips

Samsung Electronics has started mass production of 3-nanometer chips, beating Taiwan's TSMC to log the achievement.

Engineers at Samsung Electronics hold 3-nanomter wafers at the company's factory. [SAMSUNG ELECTRONICS]

Samsung Electronics has started mass production of 3-nanometer chips, beating Taiwan's TSMC to log the achievement.

The Korean company said on Thursday that the 3-nanometer chips promise a 23-percent performance increase, a 45-percent power consumption reduction and a 16-percent decline in area compared to 5-nanometer chips.

Second-generation 3-nanometer chips, due to be introduced in 2023, will reduce power consumption by up to 50 percent, improve performance by 30 percent and reduce area by 35 percent.

Neither the production yield nor clients for the new semiconductor were announced by the company, though it indicated that the chips will be used in smartphones once the yield is stabilized.

"Samsung is starting the first application of the nanosheet transistor with semiconductor chips for high performance, low power computing applications and plans to expand to mobile processors," the company said in a statement.

The performance of the 3-nanometer chips is critical to determine the chipmaker's competitiveness in chip fabrication after the latest processors made by Samsung Electronics performed worse than expected.

Local media outlets report that the first client for the new chips is Pansemi, a Shanghai-based chip designer specializing in cryptocurrency mining chips.

The key test for the chips is the uptake by major clients, like Qualcomm or Samsung Electronics.

A notable feature of the 3-nanometer manufacturing process is the use of a new transistor technology called Gate-All-Around (GAA) FET.

The technique is designed to enhance the transistor density of the chips and thus improve energy efficiency. It allows for more expanded and flexible current flows across channels at transistor gates compared to the widely used finFET technique.

In the GAA architecture, the gate contacts all four sides of the channel where current flows instead of three in the finFET structure.

"Samsung has grown rapidly as we continue to demonstrate leadership in applying next-generation technologies to manufacturing," said Choi Si-young Choi, president and head of foundry business at Samsung Electronics.

"We will continue active innovation in competitive technology development."

BY PARK EUN-JEE [park.eunjee@joongang.co.kr]